单位名称：澜起科技（上海）有限公司

专业要求：电子类

学历要求：博士、硕士

应聘方式：chao.zhou@montage-tech.com

截止时间：常年

联系方式：周超、021-61285678、chao.zhou@montage-tech.com

岗位介绍：

欢迎2016年应届生应聘！！！详情请参见附件。
感谢您对澜起科技的关注与认可，如果觉得职位匹配可直接发送简历至邮箱（chao.zhou@montage-tech.com)，如您身边有合适的朋友，也欢迎推荐。收到简历后，我们会尽快处理，谢谢。

JOB TITLE：IC Design Engineer（RF）

JOB DESCRIPTION:
- RF/analog IC design for tuners and transceivers for multi-standard TV’s and wireless systems
- Design and layout of IC blocks, such as LNA, Mixer, PA, Modulator, VGA/PGA, LPF/BPF, VCO, crystal oscillator, PLL, ADC and DAC
- Simulation of RF and analog circuits and systems in Spectre/SpectreRF and Matlab
- Testing and characterization of IC blocks and chips in lab, and ATE and field environments
- IC process and package evaluation including device modeling and PDK

QUALIFICATION:
- MS or PhD in electric and electronic engineering;
- Understanding receiver and transmitter architectures for multi-standard TV’s and wireless systems;
- Familiar with design of IC blocks in deep submicron CMOS technologies;
- Familiar with simulation tools (Spectre/SpectreRF) and oversight of layout design;
- Familiar with test characterization of IC block performances in lab and ATE environments;
- Strong communication skills and also excellence as team player.

JOB TITLE: IC Design Engineer( Analog-STB )

JOB DESCRIPTION:
- Design, evaluate and verify CMOS analog circuits and the other mixed-signal analog circuits;
- Oversee layout and verification activities which include floor plan, LVS and DRC.

QUALIFICATIONS:
- MS in electric and electronic engineering;
- Good fundamental in analysis and design of analog / mixed-signal circuits;
- Experience in Verilog,AHDL and/or Matlab and familiar with timing analysis;
- familiar with layout rules and ability to provide verification/debugging guidance;
- Solid knowledge of EDA design tools. (Analog artist, spectre, HSPICE and nc-verilog ...);
- Familiar with Computer languages such as C, C++, perl is welcome.

JOB TITLE: Signal Processing Engineer

JOB DESCRIPTION:
- Advanced communication system R&D;
- Signal processing algorithm implementation for data communication;
- Participate in projects and work with hardware & software engineers for product development, debug & test support.

QUALIFICATIONS:
- MS or PH.D of related background;
- student with strong self motivation; experienced candidate should have working knowledge in the area of digital communication;
- All candidates are expected to have in depth knowledge in the area of digital communication;
- Good communication skill, team work spirit, strong self-motivated;
- Hands-on with Matlab, C/C++, etc.

JOB TITLE：Video Algorithm Engineer（ SOC ）

JOB DESCRIPTION:
- Video related algorithm research and development.
- Video algorithm modeling.
- Video algorithm implementation based on embedded processor.
- Co-work with hardware implementation team to define micro-architecture.

QUALIFICATION:
- Master degree or PHD with strong algorithm and mathematic background, and major in Computer Science, Electronic Engineering, Applied Mathematics, etc. PHD preferred.
- Familiar with Matlab, C, C++, etc.
- Good understanding of Human Visual System, and computer vision.
- Experience in following fields is a plus
- Knowledge of video codec, such as MPEG2, H.264, HEVC/H.265, etc.
- Knowledge of video pre-processing and post-processing.
- Experience on ASIC design.

JOB TITLE：IC Design Engineer( SOC )

JOB DESCRPTION:
- 多媒体芯片中总线，显示模块及相关外设IP的开发，验证和维护；
- IP在SoC芯片中的交付以及相关的后续支持工作。

QUALIFICATION:
- 微电子，电子工程或者计算机系统相关方向的2016届硕士研究生；
- 对芯片开发有热情，愿意积极的投身于芯片设计工作；
- 熟悉ASIC相关的设计流程；
- 具备以下经验者优先：
a.C或者Perl/TCL/Python编程；
b.熟悉多媒体相关知识；
c.熟悉总线协议；
d.熟悉外设设备设计规范。

JOB TITLE：IC Verification Engineer( SOC )

JOB DESCRPTION:
- 用Python/Perl等脚本语言开发、维护自动化处理流程；
- 用PHP/SQL开发数据库管理平台；
- 承担一些常规的验证组辅助工作。

QUALIFICATION:
- 计算机专业或对脚本，数据库编程有特长的在读硕士研究生
- 熟悉PHP或其它网页开发工具
- 熟悉SQL或其它数据库语言
- 了解Python（或Perl/TCL/Makefile）脚本语言编程
- 熟悉C及C++
- 做事踏实负责，每周能保证两天或以上的full-time上班时间

JOB TITLE: IC Design Engineer( SOC Integration )

JOB DESCRPTION:
- 学习并维护基于Perl/Tcl的各类开发环境，辅助完成包括Memory定制，pin-mux生成，系统控制寄存器生成等在内的顶层设计
- 学习并辅助工程师完成模块和系统级别的形式验证（Formal Verification）
- 在资深员工指导下，参与芯片的综合与静态时序分析，编写脚本对结果进行处理和汇总

QUALIFICATION:
- 微电子或电子工程方向的在读硕士研究生
- 熟悉Verilog和数字集成电路设计原理
- 具备一定的脚本编程经验，如利用Perl等进行简单的文本处理等
- 熟悉UNIX工作环境，会使用常用工具如VIM, Makefile, CVS等
- 有学习SOC设计的明确愿望和每周至少两天的出勤率

JOB TITLE: Signal Integrity Engineer

JOB DESCRIPTION:
- Perform DDR interface SI simulation, analysis, and debug.
- Extraction of channel model using standard industry tools.
- Lab measurements of interconnect channel in frequency and time domains.

QUALIFICATION:
- MS, EE/microwave/education in other areas of basic sciences.
- Solid understanding of electromagnetic and transmission line theory, general I/O design and signal integrity principles.
- Knowledge of E.M. field solvers, time and frequency domain simulation tools like HFSS, HSPICE, ADS, etc.
- Work experience in or understanding gained through academic experience of lab measurement equipment including the following: Oscilloscopes, TDR, Vector Network Analyzer (VNA), Spectrum Analyzer, etc.
- Excellent technical communication skills.

JOB TITLE: IC Design Engineer（Digital-STB）

JOB DESCRIPTION:
-Digital module design and simulation including
-Module level architecture definition;
-Module level RTL coding;
-Module level simulation/verification;
-Corresponding synthesis/timing analysis.

QUALIFICATIONS:
-MS in electric and electronic engineering;
-Hands-on with Verilog, experience of digital design is a plus
-Good communication skill and team work spirit with strong learning ability and self-motivated.

JOB TITLE: IC Design Engineer（Analog- MB）

JOB DESCRIPTION:
- Design, evaluate and verify high speed CMOS analog/mixed circuits;
- Work closely with layout engineer for layout implementation;
- Engineering lab test and chip debug;
- Technical documentation for design, lab test, circuit analysis.

QUALIFICATION:
- MS in electric and electronic engineering;
- Good fundamental in design and analysis of analog/mixed circuit;
- Good understanding in CMOS process technology and device physics;
- Experience in behavioral modeling by Verilog and/or Matlab;
- Familiar with EDA tools (Virtuoso, spectre, HSPICE, calibre, etc);
- Design experience in any of the following areas is preferred: SerDes, high-speed I/O’s, PHY, PCIe, USB.

企业介绍：

公司简介：

澜起科技集团有限公司（简称“澜起”），是一家专注于为家庭娱乐和云计算市场提供模拟与混合信号半导体解决方案的全球芯片供应商。

公司拥有非常完善的研发设计平台，其中包含了射频、模拟前端、数字信号处理以及高速接口等自主研发的功能模块，能够快速、灵活地进行模块化设计，研发出高性能、低功耗的芯片产品。

在家庭娱乐领域，澜起利用此平台为机顶盒客户提供了全方位、高集成度芯片的解决方案，其中软件方案更是为客户贴身定制。这些方案优化了机顶盒的信号处理能力，尤其适用于新兴市场的严苛工作环境。

在云计算领域，澜起致力于提供高性能、低功耗的内存接口解决方案，以满足内存密集型服务器的应用需求。通过模块化的研发平台，澜起能够实现持续创新、快速高效的产品设计，不断推出更为优化的整体解决方案，以满足客户日异月新的需求。

我们的团队：

澜起科技集团下属上海、苏州、杭州、台湾、香港、澳门以及美国等多家分公司，目前共有员工500多人。

我们的4大优势：

1. 工作环境与作风：自由、宽松、友好的工作环境；务实、执着、专注的工作作风；公司注重员工工作与生活的平衡，为员工提供兴趣发展的平台，鼓励员工健康生活，快乐工作。

2. 学习和成长平台：公司集模拟、射频、数字、数模混合、信号处理等多领域的行业专家以及优秀开发团队，为员工提供专业深入的带教和辅导，帮助员工迅速成长并 不断提高专业研发水平；产品研发涉及从前端到后端各个领域，员工在术有专攻的基础上，有机会和平台不断拓宽、积累知识和经验。成立至今，已申请中国和美国 专利70多项，充分展示了公司科技研发团队的实力。

3. 职业路径与发展空间：公司为员工设计了清晰可行的专业及管理双通道的职业发展路径，在发挥员工优势的基础上，更关注员工工作与兴趣的结合，给予员工更多不同的职业发展选择。

4. 薪酬与未来前景：除了为员工提供有竞争力的薪酬与多样化的福利，公司还根据员工的发展潜力以及绩效，提供股票与期权的奖励。员工可以从中享受到更为丰厚的回报。

详情请见我司官网：www.montage-tech.com

相关附件：

1. Company_Overview_Chinese_20150429.pdf 下载
2. 澜起科技应届生职位-上海.pdf 下载

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